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From: "Edward Rawde" <invalid@invalid.invalid>
Newsgroups: sci.electronics.design
Subject: Re: Current mirror version of the lowish distortion 1kHz sine wave osillator
Date: Thu, 16 Jan 2025 09:51:57 -0500
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"Bill Sloman" <bill.sloman@ieee.org> wrote in message news:vmadei$3dim0$1@dont-email.me...
> On 16/01/2025 2:41 pm, Edward Rawde wrote:
>> "Bill Sloman" <bill.sloman@ieee.org> wrote in message news:vm9tod$37i55$1@dont-email.me...
>>> On 16/01/2025 7:23 am, Edward Rawde wrote:
>>>> "Don" <g@crcomp.net> wrote in message news:20250115a@crcomp.net...
>>>>> Edward Rawde wrote:
>>>>>> Bill Sloman wrote:
>>>>>>> This just reworks my circuit to use a controllable asymmetric current mirror instead of the FET for gain control. I take the
>>>>>>> feedback from the full wave rectifier and switch every half-cycle to reconstruct a variable amplitude sine wave to control 
>>>>>>> the
>>>>>>> output amplitude. It does use a lot of components, but it strikes me as fairly comprehensible.
>>>>>>>
>>>>>>
>>>>>> First I corrected the usual line wrap issues.
>>>>>>
>>>>>> In the latest LTSpice (24.1.0) it took me a good hour or two to find out why I was getting strange netlist errors for all the
>>>>>> opamps
>>>>>> in the circuit.
>>>>>>
>>>>>> This turned out to be .ENDS in the BAS70L model. Remove .ENDS and the issues go away.
>>>>>>
>>>>>> So this is the circuit I'm simulating in 24.1.0 with no component updates available.
>>>>>> I'm expecting it to take 2 hours to complete.
>>>>>
>>>>> Thank you for your tip to wait 2 hours for results. For what it's worth,
>>>>> Bill's original LTSpice source worked for me "as is."
>>>>
>>>> It did for me too, but because it looked like simulation time would be long I moved it to another machine I use over remote
>>>> desktop.
>>>> On that machine LTSpice asked if I'd like the latest version so I upgraded to 24.1.0.
>>>> After the upgrade I got very strange netlist errors which didn't mention BAS70L and it took a while to figure out the cause.
>>>>
>>>> I'm now revising the simulation time to a minimum of 4 days for 10 seconds.
>>>> 24.1.0 seems to be faster.
>>>
>>> My computer seems to be faster. It mostly simulates at about 25msec/sec for me so I get my 10 seconds in about seven minutes of
>>> real time. There are spots early in the process where it slows down, but not for long.
>>
>> The Lenovo core i7 3.6GHz with SSD I'm running it on hasn't gone above 30us/s.
>> If your computer is 1000 times faster I'd like to have one, otherwise there's another explanation somewhere.
>
> My computer uses an i5-3470 CPU running at 3.20GHz. It's more than ten years old. LTSpice uses my SSD card which isn't original, 
> so your hardware ought to be even faster.

So there's some reason I don't yet understand why my simulation of the same circuit is a lot slower.
Simulation of the 120dB circuit I posted some time ago completes in minutes on either 24.1.0 or earlier versions.

>
> <snip>
>
> -- 
> Bill Sloman, Sydney
>
>
>