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From: John Levine <johnl@taugh.com>
Newsgroups: comp.arch
Subject: Re: Cost of handling misaligned access
Date: Tue, 4 Feb 2025 01:49:04 -0000 (UTC)
Organization: Taughannock Networks
Message-ID: <vnrrmg$2adb$1@gal.iecc.com>
References: <5lNnP.1313925$2xE6.991023@fx18.iad> <vnr7f2$1egqs$1@dont-email.me> <vnrb15$105p$1@gal.iecc.com> <112ffb344782247afc7b5e9e36c085d5@www.novabbs.org>
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Cleverness: some
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Originator: johnl@iecc.com (John Levine)
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According to MitchAlsup1 <mitchalsup@aol.com>:
>> That's a total of 23 pages, double it for the P0 or P1 page tables,
>> and it's only 46 pages.
>>
>> That's still kind of a lot.
>
>Basically, VAX taught us why we did not want to do "all that" in
>a single instruction; 

Yes, VAX was brilliantly optimized for hand-coded assembler on a very
memory constrained system where microcode was much faster than main
memory. Too bad that was obsolete by the time they shipped it.

>while Intel 432 taught us why we did not bit
>aligned decoders (and a lot of other things).

It was certainly an interesting experiment in yet another way that
Intel wanted programmers to use their computers and the programmers
said, naah.


-- 
Regards,
John Levine, johnl@taugh.com, Primary Perpetrator of "The Internet for Dummies",
Please consider the environment before reading this e-mail. https://jl.ly