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From: "Edward Rawde" <invalid@invalid.invalid>
Newsgroups: sci.electronics.design
Subject: Re: A variation on my current mirror low distortion sine wave oscillator - 10dB less distortion and much the same number of components
Date: Fri, 14 Feb 2025 14:56:44 -0500
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"JM" <sunaecoNoChoppedPork@gmail.com> wrote in message news:637vqjpics9oqi4gsv4vv200cf7t3kovb6@4ax.com...
> On Fri, 14 Feb 2025 13:03:46 -0500, "Edward Rawde"
> <invalid@invalid.invalid> wrote:
>
>>"Bill Sloman" <bill.sloman@ieee.org> wrote in message news:vompa5$3bjpm$1@dont-email.me...
>>> On 14/02/2025 5:24 am, Edward Rawde wrote:
>>>> "Bill Sloman" <bill.sloman@ieee.org> wrote in message news:vol49p$2vd0d$1@dont-email.me...
>>>>> On 14/02/2025 1:45 am, Edward Rawde wrote:
>>>>>> "Bill Sloman" <bill.sloman@ieee.org> wrote in message news:voh7a5$26aqj$1@dont-email.me...
>>>>>>> On 10/02/2025 5:18 pm, Bill Sloman wrote:
>>>>>>>> Basically same idea, but two separate controllable asymmetric current mirrors, rather than one, and no current steering. 
>>>>>>>> The
>>>>>>>> half-wave rectifier still seems to be the source of the distortion in the stabilised output.
>>>>>>>>
>>>>>>>> C25 and C26 take out as much of it as I can. Increasing them - from 15nF to 33nF makes the distortion worse. Splitting the
>>>>>>>> resistors into three rather than two and adding two more capacitors might help, but what this circuit needs is more 
>>>>>>>> insight,
>>>>>>>> rather than more components.
>>>>>>>
>>>>>>> Splitting the resistors did help, and the optimum capacitor value at C25, C26, C27 and C28 turned out to be 4.7nF. The 
>>>>>>> second
>>>>>>> and
>>>>>>> fifth harmonics were just 80dB below the fundamental and the third 91dB down. Not dramatically good, but respectable.
>>>>>>>
>>>>>>> Other changes were less successful - the current mirror approach does suffer from the need to split the waveform in order to
>>>>>>> generate the amplitude correction waveform and minimising the 2usec wide switching spikes that show up at cross-over is what
>>>>>>> it
>>>>>>> takes to get it to work tolerably well
>>>>>>>
>>>>>>> I've swapped out the LT1115 for the LT1678 - that doesn't seem to suffer from parasitic oscillations in LTSpice 24, so it
>>>>>>> should
>>>>>>> simulate tolerably fast.
>>>>>>>
>>>>>> After fixing line wraps I had to move U1 down into position.
>>>>>> I then noticed an issue with C10 so I converted to ANSI in Notepad++ and saved the file.
>>>>>
>>>>> When I picked up your text file, I noted that C10 (on the output of U4, the LTC6655-1.25 voltage reference) had gone back to
>>>>> 3.3 -
>>>>> no suffix. I set it back to 3300n(F) and the circuit worked as it did for me with the harmonics mostly 80dB down with the 
>>>>> third
>>>>> harmonic about 91dB down
>>>>>
>>>>>> Simulation then failed without giving any clue what was wrong.
>>>>>> But instead of spending hours tracing the problem I removed .ENDS from the BAS70 model.
>>>>>
>>>>> I put it back in again. and it didn't make any difference to my simulation.
>>>>
>>>> It will for anyone else using 24.1.2.
>>> >
>>>> I note that the model for MMBF4391 is still present and does not have .ENDS so why should BAS70 need it?
>>>> In 24.1.2 you get errors which make no sense and do not mention BAS70.
>>>
>>> The BAS70 model dates back to 2015. It's a classic Spice model - and LTSpice is supposed to run them.
>>
>>Online searching finds "A SPICE model starts with a .SUBCKT statement and ends with an .ENDS statement" which does not seem to be
>>applicable here.
>>
>>24.1.2 seems to simulate just fine if .ENDS is removed from the BAS70 model.
>>But if .ENDS is included then the simulation does not run and the following log is produced.
>>Now tested on two different computers running 24.1.2
>>
>>LTspice 24.1.2 for Windows
>>Circuit: C:\Users\Edward\Desktop\sloman 14 Feb 2025\sloman.net
>>Start Time: Fri Feb 14 11:10:46 2025
>>C:\Users\Edward\Desktop\sloman 14 Feb 2025\sloman.net(2): This sub-circuit name is not defined.
>>X�U1 N040 N035 N006 N052 N039 LT1360
>>                             ^^^^^^^
>>C:\Users\Edward\Desktop\sloman 14 Feb 2025\sloman.net(22): This sub-circuit name is not defined.
>>X�U5 N037 N019 Vcc Vee N002 LT1056
>>                           ^^^^^^^
>>C:\Users\Edward\Desktop\sloman 14 Feb 2025\sloman.net(25): This sub-circuit name is not defined.
>>X�U2 0 N033 N017 N051 N030 OP27
>>                          ^^^^^
>>C:\Users\Edward\Desktop\sloman 14 Feb 2025\sloman.net(47): This sub-circuit name is not defined.
>>X�U4 N038 N038 0 N037 N037 LTC6655-1.25
>>                          ^^^^^^^^^^^^^
>>C:\Users\Edward\Desktop\sloman 14 Feb 2025\sloman.net(57): This sub-circuit name is not defined.
>>X�U6 N032 N021 Vcc Vee filt1 LT1013
>>                            ^^^^^^^
>>C:\Users\Edward\Desktop\sloman 14 Feb 2025\sloman.net(62): This sub-circuit name is not defined.
>>X�U7 N029 N013 Vcc Vee filter2 LT1013
>>                              ^^^^^^^
>>C:\Users\Edward\Desktop\sloman 14 Feb 2025\sloman.net(80): This sub-circuit name is not defined.
>>X�U9 0 N025 Vcc Vee N034 LT1013
>>                        ^^^^^^^
>>C:\Users\Edward\Desktop\sloman 14 Feb 2025\sloman.net(81): This sub-circuit name is not defined.
>>X�U10 0 N044 Vcc Vee N001 LT1056
>>                         ^^^^^^^
>>C:\Users\Edward\Desktop\sloman 14 Feb 2025\sloman.net(87): This sub-circuit name is not defined.
>>X�U11 0 N022 Vcc Vee N023 LT1013
>>                         ^^^^^^^
>>C:\Users\Edward\Desktop\sloman 14 Feb 2025\sloman.net(102): This sub-circuit name is not defined.
>>X�U3 0 N011 N024 N004 N045 LT1678
>>                          ^^^^^^^
>>C:\Users\Edward\Desktop\sloman 14 Feb 2025\sloman.net(103): This sub-circuit name is not defined.
>>X�U8 0 N014 Vout N005 N046 LT1678
>>                          ^^^^^^^
>>The ^^ characters are positioned under the device type.
>>Under LT1360 for the first error.
>>Formatting differences may not show this correctly.
>>
>>It took me a while not long ago to slowly add/remove parts of your circuit until I found out that removing .ENDS in the BAS70 
>>model
>>on the schematic eliminated the above issues and the simulation in 24.1.0 ran fine.
>>
>>>
>>>>> Simulation now runs fine at about 44 ms/s in LTSPice 24.1.2
>>>>>> FFT is approaching 60dB
>>>>>
>>>>> Not having the right value capacitor at C10 usually totally messes it up. We've had that issue before.
>>>>
>>>> C10 is 3.3uF
>>>> Changing to 3300n and resimulating makes no difference. Definitely only 60dB difference between 1kHz and 2,3,4,5kHz
>>>> Exact circuit I'm simulating (in 24.1.2) included below.
>>>
>>> And when I run it (after having put U1 back where I intended it to go and restored it's connection to the negative rail) I got 
>>> the
>>> second to the fifth harmonics harmonics 80dB below the fundamental with the third 91dB down. When I stretched the frequency
>>> display out to 100kHz the higher harmonics were going down.
>>
>>I ran your circuit to 10 seconds on 24.1.2 (about 4 minutes) and took a sample of about 60 cycles near 10 seconds.
>>I then did an FFT on Vout (U8 output) and selected current zoom extent and Blackman-Harris Window.
>>The vertical scale has 20dB at the top with 1kHz at 0dB one square down.
>>Another three squares down are 2,3,4,5 kHz approaching the 60dB line.
>>
>>So let's copy the asc file to another computer with LTSPice 17.0.34.0 and no component updates since installation.
>>Fix the position of U1 and add .ENDS to the BAS70 model. Simulate.
>>Speed is about the same 44ms/s but drops to 7ms/s after about 2 seconds simulated and then goes back to 44ms/s
>>Appearance is as above. 3.2V pk initial transient then settling at 1.6V pk.
>>Same FFT as above.
>>Approaching 80dB at 2kHz, 3kHz 4kHz 75dB, 5kHz 65dB
>>Remove .ENDS from BAS70 model and resimulate.
>>Similar result depends a little on exact sample taken, maybe a little worse at 2kHz.
>>Put .ENDS back again and resimulate. Exactly the same FFT result so .ENDS as used here is best removed to avoid issues when
>>upgrading to 24.1.x
>>.ENDS is only an issue in 24.1.0 or later and only in the context described above.
>>
>>So I wonder which simulation is closer to the truth.
>>
>>>
>>> I did let it settle down for two seconds before taking the FFT of V(out) onver the next second or so.
>>>
>>>>>> Simulated circuit included below.
>>>>>> I can get 80dB by adding an LC tuned circuit to a simple phase shift oscillator of the type which turns up here:
>>>>>> https://www.google.com/search?q=sine+wave+oscillator&udm=2
>>>>>
>>>>> Where? There's a lot of stuff there.
>>>>
>>>> Phase shift oscillator with feedback from the collector through CRCRCRCR to the base.
>>>
>>> That is the simplest phase shift oscillator. Why didn't you identify it when you first mentioned it?
>>
>>Because it didn't matter and there is more than one example of that type of circuit.
>>Most circuits which turn up there can't manage more than 60dB and those which can are unlikely to manage more than 90dB.
>>It's not long ago when I didn't think I'd do better than 90dB in simulation, but I kept at it. Now I can do 135dB in simulation 
>>with
>>all simulated real (yes ok that's a contradiction) components.
>>
>>>
>>>>>> No gain control yet but for unknown reasons it does run at constant (unpredictable) amplitude with very critical emitter
>>>>>> resistor
>>>>>> adjustment.
>>>>>
>>>>> It's probably relying on the change in current gain with changing collector-base voltage. It is a small effect - the Early
>>>>> effect - and non-linear.
>>>>>
>>>>>> I'm thinking of trying the sample/hold method posted by JM but with real components.
>>>>>> So I need to turn a FET on (not sure for how long yet) at the peaks of the sine wave.
>>>>>
>>>>> Sample and holds tend to put spikes on the supply rails. Keeping them out of the output can take a lot of work.
>>>>
>>>> Yeah I've had that problem before, decades ago.
>>>> A capacitively coupled inverted sampling signal was able to sufficiently remove the problem of  the sampling signal appearing 
>>>> in
>>>> the
>>>> output.
>>>
>>> Reduce rather than remove. Cancellation schemes rarely work perfectly.
>>>
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