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Path: ...!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!eternal-september.org!.POSTED!not-for-mail From: dbush <dbush.mobile@gmail.com> Newsgroups: comp.theory Subject: Re: DD correctly emulated by HHH --- Totally ignoring invalid rebuttals ---PSR--- Date: Thu, 6 Mar 2025 08:22:36 -0500 Organization: A noiseless patient Spider Lines: 100 Message-ID: <vqc7ir$302qp$1@dont-email.me> References: <vq5qqc$1j128$2@dont-email.me> <vq6g9l$1ptg9$2@dont-email.me> <vq722k$1tapm$1@dont-email.me> <vq751g$1t7oc$1@dont-email.me> <vq78ni$1u8bl$3@dont-email.me> <5e786c32c2dcc88be50183203781dcb6a5d8d046@i2pn2.org> <vq866t$23nt0$1@dont-email.me> <2002d599ebdfb7cd5a023881ab2faca9801b219d@i2pn2.org> <vq8l3d$29b9l$1@dont-email.me> <4426787ad065bfd0939e10b937f3b8b2798d0578@i2pn2.org> <vq8mam$29b9l$5@dont-email.me> <920b573567d204a5c792425b09097d79ee098fa5@i2pn2.org> <vq9lvn$2ei4j$3@dont-email.me> <4453bc0c1141c540852ea2223a7fedefc93f564c@i2pn2.org> <vqadoh$2ivg7$2@dont-email.me> <vqae74$2ivcn$1@dont-email.me> <vqag6q$2jief$1@dont-email.me> <vqagb7$2ivcn$3@dont-email.me> <vqakhi$2jief$3@dont-email.me> <vqalvr$2ivcn$5@dont-email.me> <vqaq2s$2lgq7$2@dont-email.me> <vqasm4$2lue4$1@dont-email.me> <vqb43k$2mueq$1@dont-email.me> <vqb4ub$2lue4$3@dont-email.me> <vqb683$2mueq$2@dont-email.me> <vqb6f4$2lue4$4@dont-email.me> <vqb6qr$2mueq$3@dont-email.me> <vqb70b$2lue4$5@dont-email.me> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Injection-Date: Thu, 06 Mar 2025 14:22:35 +0100 (CET) Injection-Info: dont-email.me; posting-host="7e9a184460760c22e32d5c12ff9ace5a"; logging-data="3148633"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX1+QkLTLEfYc1N071ZNozjIB" User-Agent: Mozilla Thunderbird Cancel-Lock: sha1:C1W0bAIFFp189xIOjxhP2IvTYSM= Content-Language: en-US In-Reply-To: <vqb70b$2lue4$5@dont-email.me> Bytes: 5770 On 3/5/2025 11:06 PM, dbush wrote: > On 3/5/2025 11:03 PM, olcott wrote: >> On 3/5/2025 9:57 PM, dbush wrote: >>> On 3/5/2025 10:53 PM, olcott wrote: >>>> On 3/5/2025 9:31 PM, dbush wrote: >>>>> On 3/5/2025 10:17 PM, olcott wrote: >>>>>> On 3/5/2025 7:10 PM, dbush wrote: >>>>>>> >>>>>>> In other words, you know that what you're working on has nothing >>>>>>> to do with the halting problem, but you don't care. >>>>>> >>>>>> In other words I WILL NOT TOLERATE ANY BULLSHIT DEFLECTION. >>>>>> You have proven that you know these things pretty well SO QUIT THE >>>>>> SHIT! >>>>>> >>>>> >>>>> You want people to accept that HHH(DD) does in fact report that >>>>> changing the code of HHH to an unconditional simulator and running >>>>> HHH(DD) will not halt. >>>>> >>>> >>>> DD correctly emulated by HHH cannot possibly >>>> reach its own "ret" instruction and terminate normally. >>> >>> In other words, replacing the code of HHH with an unconditional >>> simulator and subsequently running HHH(DD) does not halt, which you >>> previously agreed is correct: >>> >>> On 2/22/2025 1:02 PM, olcott wrote: >>> > On 2/22/2025 11:10 AM, dbush wrote: >>> >> On 2/22/2025 11:43 AM, olcott wrote: >>> >>> The first point is DD correctly simulated by HHH cannot >>> >>> possibly terminate normally by reaching its own "return" >>> >>> instruction. >>> >> >>> >> In other words, if the code of HHH is replaced with an >>> unconditional simulator then it can be shown that DD is non-halting >>> and therefore HHH(DD)==0 is correct. >>> >> >>> > >>> > Wow finally someone that totally gets it. >>> >>> >>> If you disagree, explain why this is different. >>> >>> In particular, give an example where X correctly emulated by Y is >>> different from replacing the code of Y with an unconditional >>> simulator and subsequently running Y(X). >> >> I may not have enough time left to change the subject >> and endlessly go through anything but the exact point. >> >> The purpose of these posts is so that my posthumous >> reviewers will understand. >> > > Last chance: > > Give an example where X correctly emulated by Y is > different from replacing the code of Y with an unconditional simulator > and subsequently running Y(X). > > Failure to do so in your next reply (or within one hour of your next > post in this newsgroup) will be taken as your on-the-record admission > that they mean the same thing, and that additionally you officially > approve of replacing the former with the latter in any of your quotes to > make it clear exactly what you're talking about. > Let The Record Show that Peter Olcott made the following post in this newsgroup after the above quoted message: On 3/5/2025 11:41 PM, olcott wrote: > No matter WTF HHH is DD cannot possibly reach its "ret" > instruction and terminate normally when correctly emulated by HHH. > Either this is over your head or you are a liar. There is > no third choice. And has not responded to the quoted message above more than 8 hours after he made the above post. He has therefore satisfied the requirements stated above for admission of the given statement. So: Let The Record Show: That Peter Olcott: Has admitted that the following statement (Statement 1): DD correctly simulated by HHH Is exactly equivalent to the following statement (Statement 2): Replacing the code of HHH with an unconditional simulator and subsequently running HHH(DD) And has given his official permission to anyone responding to his messages to replace Statement 1 with Statement 2 in any of his quoted messages for the purposes of making it clear what he is claiming