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From: olcott <polcott333@gmail.com>
Newsgroups: comp.theory
Subject: Re: DD correctly emulated by HHH --- Totally ignoring invalid
 rebuttals ---PSR---
Date: Sat, 8 Mar 2025 11:50:56 -0600
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On 3/8/2025 9:46 AM, Fred. Zwarts wrote:
> Op 08.mrt.2025 om 15:03 schreef olcott:
>> On 3/8/2025 2:47 AM, Fred. Zwarts wrote:
>>> Op 08.mrt.2025 om 02:49 schreef olcott:
>>>> On 3/7/2025 10:25 AM, Fred. Zwarts wrote:
>>>>> Op 07.mrt.2025 om 16:17 schreef olcott:
>>>>>> On 3/7/2025 2:59 AM, Fred. Zwarts wrote:
>>>>>>> Op 06.mrt.2025 om 21:13 schreef olcott:
>>>>>>>> On 3/6/2025 3:13 AM, Fred. Zwarts wrote:
>>>>>>>>> Op 06.mrt.2025 om 04:53 schreef olcott:
>>>>>>>>>> On 3/5/2025 9:31 PM, dbush wrote:
>>>>>>>>>>> On 3/5/2025 10:17 PM, olcott wrote:
>>>>>>>>>>>> On 3/5/2025 7:10 PM, dbush wrote:
>>>>>>>>>>>>>
>>>>>>>>>>>>> In other words, you know that what you're working on has 
>>>>>>>>>>>>> nothing to do with the halting problem, but you don't care.
>>>>>>>>>>>>
>>>>>>>>>>>> In other words I WILL NOT TOLERATE ANY BULLSHIT DEFLECTION.
>>>>>>>>>>>> You have proven that you know these things pretty well SO 
>>>>>>>>>>>> QUIT THE SHIT!
>>>>>>>>>>>>
>>>>>>>>>>>
>>>>>>>>>>> You want people to accept that HHH(DD) does in fact report 
>>>>>>>>>>> that changing the code of HHH to an unconditional simulator 
>>>>>>>>>>> and running HHH(DD) will not halt.
>>>>>>>>>>>
>>>>>>>>>>
>>>>>>>>>> DD correctly emulated by HHH cannot possibly
>>>>>>>>>> reach its own "ret" instruction and terminate normally.
>>>>>>>>>
>>>>>>>>> Yes, we agree that HHH fails to reach the 'ret' instruction, 
>>>>>>>>
>>>>>>>> Despicably dishonest attempt at the straw-man deception.
>>>>>>>>
>>>>>>>
>>>>>>> No rebuttal. So, we agree that HHH fails to reach the 'ret' 
>>>>>>> instruction. 
>>>>>>
>>>>>> Not at all. Trying to get away with changing the subject
>>>>>> WILL NOT BE TOLERATED.
>>>>>>
>>>>> If you do not agree that HHH fails to reach the 'ret' instruction 
>>>>> (that world-class simulators do reach, just as the direct execution 
>>>>> does), show how it reaches the 'ret' instruction.
>>>>
>>>> *set X*
>>>> When-so-ever any input to any simulating termination
>>>> analyzer calls the simulator that is simulating itself
>>>>
>>>> *result of set X*
>>>> this input cannot possibly reach its own final state
>>>> and terminate normally because it remains stuck in
>>>> recursive emulation.
>>>>
>>>
>>> So, we agree that any simulator that tries to simulate *itself* 
>>> cannot possibly reach the end of its simulation.
>>
>> Apparently you don't understand that inputs to a
>> simulating termination analyzer specifying infinite
>> recursion or recursive emulation cannot possibly
>> reach their own final state and terminate normally.
> 
> If we agree, what is the problem?
> We agree that HHH correctly reports that it cannot possibly bring the 
> simulation of itself to a correct end.
> 
>>
>>> Why would we want to use such an analyser that reports that it fails 
>>> to complete the simulation?
>>
>> Perhaps you incorrectly expect infinite loops to end?
>>
> 
> Wrong. I understand perfectly that HHH cannot possible reach the end of 
> the simulation of itself and it correctly reports that it could not 
> complete the simulation.
> 

DD specifies non-termination.

-- 
Copyright 2025 Olcott "Talent hits a target no one else can hit; Genius
hits a target no one else can see." Arthur Schopenhauer