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Path: news.eternal-september.org!eternal-september.org!.POSTED!not-for-mail From: Lawrence D'Oliveiro <ldo@nz.invalid> Newsgroups: comp.arch Subject: Re: rep movsb vs. simpler instructions for memcpy/memmove Date: Thu, 13 Mar 2025 02:34:11 -0000 (UTC) Organization: A noiseless patient Spider Lines: 16 Message-ID: <vqtg73$2u4jc$1@dont-email.me> References: <vpufbv$4qc5$1@dont-email.me> <vq4qav$1dksd$1@dont-email.me> <vq5dm2$1h3mg$5@dont-email.me> <2025Mar4.110420@mips.complang.tuwien.ac.at> <vq829a$232tl$6@dont-email.me> <2025Mar5.083636@mips.complang.tuwien.ac.at> <vqdljd$29f8f$2@paganini.bofh.team> <vqdrh9$3cdrc$1@dont-email.me> <vqqcm0$3l3i5$1@paganini.bofh.team> <2025Mar12.094228@mips.complang.tuwien.ac.at> <20250312114828.00003e99@yahoo.com> <2025Mar12.122836@mips.complang.tuwien.ac.at> <20250312140915.000010a8@yahoo.com> <2025Mar12.174636@mips.complang.tuwien.ac.at> <a296144c60c9774898235f505bc4c370@www.novabbs.org> <vqt7d7$2se4a$5@dont-email.me> <7139de3c292f37d70bc8086a904fb6e0@www.novabbs.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Injection-Date: Thu, 13 Mar 2025 03:34:11 +0100 (CET) Injection-Info: dont-email.me; posting-host="06a7c1ccb3615841c0c0b8f3e14de3ef"; logging-data="3084908"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX19dTndYd9wTIM8bn602iS93" User-Agent: Pan/0.162 (Pokrosvk) Cancel-Lock: sha1:8mD3AgumxbQEvTvnE2KwwAmqmW8= On Thu, 13 Mar 2025 00:49:47 +0000, MitchAlsup1 wrote: > On Thu, 13 Mar 2025 0:03:51 +0000, Lawrence D'Oliveiro wrote: > >> On Wed, 12 Mar 2025 17:44:11 +0000, MitchAlsup1 wrote: >> >>> My 66000 has MM memmove as an instruction (4-bytes) always optimal, no >>> checking required. >> >> Presumably interruptible and resumable ... > > Yep; but also include able to take exceptions. So you have a VAX-style “first part done” processor status bit? And you use architectural registers to save/restore the state of an instruction in progress at the time of an interrupt?