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From: Robert Finch <robfi680@gmail.com>
Newsgroups: comp.arch
Subject: MMU using base and bound
Date: Thu, 10 Apr 2025 03:02:41 -0400
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Working on the MMU component tonight.

Just realized that it is possible to have only a single hierarchical 
page table in the system if base and bound addressing is applied before 
translating with the page table. Or to reduce the number of page tables 
using the base/bound addressing.

Building base/bound registers into the MMU, pondering having multiple 
sets of registers to reduce the amount of register swapping. A single 
BRAM should be enough for 32 sets of 16 registers. Could store an index 
for selecting the set in the process control block. Defaulting set zero 
for flat addressing.