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From: Robert Finch <robfi680@gmail.com>
Newsgroups: comp.arch
Subject: Re: auto predicating branches
Date: Sun, 20 Apr 2025 21:26:53 -0400
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On 2025-04-20 2:44 a.m., Robert Finch wrote:
>>
>> I have several examples where My 66000 with only 32-GPRs compiles
>> to fewer instructions than RISC-V with 32+32 registers.
>>
>> I have other examples where My 66000 does not need spill/fill code
>> and RISC-V does, too.
>>
>>>
>>> I like having the extra register files, it is just a personal
>>> programming convenience. It reduces the pressure on the general-purpose
>>> register file.
>>
>> Universal constants also reduces pressure both on ISA on the GPRs, and
>> on executing instructions.
> 
> Stark uses a four bit code to encode where on the cache line a large 
> constant is located. The assembler just piles them up at the end of the 
> cache line. Sometimes space is wasted if an instruction with a constant 
> will not fit on the cache line. I think it is <6%. It has got to be 
> close to the finagling that RISCV does for larger constants.
>>
>>
>> Changing the capital R in RISC into a lower case r ?!?
> 
> Lower case r?
> 
> Been working on predicate logic tonight. Predicate shadow is limited to 
> six instruction due to a limited mask size. Can always code more of the 
> same predicate to skip more instructions.
> 
> I have the code searching the ROB backwards until a predicate 
> instruction is encountered, to determine if there is a predicate. 
> Searching fewer instructions helps. Probably not the cleverest way of 
> doing things, sort of brute force.

Got hung up on the predicate logic and decided to tackle something 
easier but similar. Having branches automatically convert into 
predicates when they branch forward a short distance <7 instructions. 
The instructions are likely already in the pipeline since it is only one 
or two instruction groups.

Ran into issues with the predicate logic and the LOC were just 
exploding. Better to work on improving the branches first, predicates 
might fall out later.