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From: Richard Kettlewell <invalid@invalid.invalid>
Newsgroups: comp.sys.raspberry-pi
Subject: Re: New Pico2
Date: Tue, 13 Aug 2024 08:40:26 +0100
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druck <news@druck.org.uk> writes:
> On 11/08/2024 22:32, Single Stage to Orbit wrote:
>> I've got a RISCV baremetal operating system I might bring up on this
>> device but looking at the datasheet for the RISCV processor used, it's
>> only got machine mode and user mode, no supervisor mode and no paging.
>> It does not even support any of the Sv pagetables so that's a
>> challenge.

Also no floating point, if I’ve understood correctly?

> The joys open "open source" CPUs with no standardised feature sets.
>
>> Most interestingly enough, you can actually boot up with one RISCV core
>> and one ARM core, two RISCV cores or both ARM cores. Mixed processor
>> cores that'll be fun to see what we can do with that.
>
> I think they did that for all the people who keep insisting they
> should move to the "new future" of RISC V. Now they can find out how
> badly it compares to a contemporary ARM core.

It’s a slightly odd device, isn’t it?

If you wanted to explore RISC-V then there’s more flexible options. If
you just wanted a microcontroller for something and didn’t care too much
about CPU architecture then the dual-architecture thing is wasted. Two
entire CPU cores that you don’t get to use.

-- 
https://www.greenend.org.uk/rjk/