Path: ...!news.iecc.com!.POSTED.news.iecc.com!not-for-mail From: John Levine Newsgroups: comp.arch Subject: Re: mainframe Byte Addressability And Beyond Date: Fri, 31 May 2024 19:41:01 -0000 (UTC) Organization: Taughannock Networks Message-ID: References: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Injection-Date: Fri, 31 May 2024 19:41:01 -0000 (UTC) Injection-Info: gal.iecc.com; posting-host="news.iecc.com:2001:470:1f07:1126:0:676f:7373:6970"; logging-data="28970"; mail-complaints-to="abuse@iecc.com" In-Reply-To: Cleverness: some X-Newsreader: trn 4.0-test77 (Sep 1, 2010) Originator: johnl@iecc.com (John Levine) Bytes: 2211 Lines: 27 According to Terje Mathisen : >> Read all about it: https://www.vm.ibm.com/library/other/22783213.pdf >> >> It's on page 7-251. >> >Thanks! > >I did read all of it, and it was pretty close to how I would have >designed a sw function to do the same, except for the very funky ABI: > >Both source and destination _must_ be an even register number, with the >following odd register providing the count/length. That's the way they've been handling address+length pairs since they added long compare and move instructions in S/370. They're so common I'd expect there to be hardware to deal with them. >Just from this little snippet I'm pretty sure this instruction has a >sizeable startup overhead, compiler support is probably in the form of >an intrinsic that knows about the need to allocate two pairs of >register, each pair starting at an even-numbered register. Same register allocation would be needed for a string compare or move, so that's nothing new. -- Regards, John Levine, johnl@taugh.com, Primary Perpetrator of "The Internet for Dummies", Please consider the environment before reading this e-mail. https://jl.ly