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From: joes <noreply@example.org>
Newsgroups: comp.theory
Subject: Re: key error in all the proofs --- Mike --- basis
Date: Wed, 14 Aug 2024 16:31:26 -0000 (UTC)
Organization: i2pn2 (i2pn.org)
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Am Wed, 14 Aug 2024 08:42:33 -0500 schrieb olcott:
> On 8/14/2024 2:30 AM, Mikko wrote:
>> On 2024-08-13 13:30:08 +0000, olcott said:
>>> On 8/13/2024 6:23 AM, Richard Damon wrote:
>>>> On 8/12/24 11:45 PM, olcott wrote:
>>>>>
>>>>> *DDD correctly emulated by HHH cannot possibly reach its* *own
>>>>> "return" instruction final halt state, thus never halts*
>>>>>
>>>> Which is only correct if HHH actuallly does a complete and correct
>>>> emulation, or the behavior DDD (but not the emulation of DDD by HHH)
>>>> will reach that return.
>>>>
>>> A complete emulation of a non-terminating input has always been a
>>> contradiction in terms.
>>> HHH correctly predicts that a correct and unlimited emulation of DDD
>>> by HHH cannot possibly reach its own "return" instruction final halt
>>> state.
>> 
>> That is not a meaningful prediction because a complete and unlimited
>> emulation of DDD by HHH never happens.
>> 
> A complete emulation is not required to correctly predict that a
> complete emulation would never halt.
What do we care about a complete simulation? HHH isn't doing one.

-- 
Am Sat, 20 Jul 2024 12:35:31 +0000 schrieb WM in sci.math:
It is not guaranteed that n+1 exists for every n.