Path: ...!weretis.net!feeder9.news.weretis.net!news.nk.ca!rocksolid2!i2pn2.org!.POSTED!not-for-mail From: mitchalsup@aol.com (MitchAlsup1) Newsgroups: comp.arch Subject: Re: Banked register files Date: Tue, 20 Aug 2024 01:19:10 +0000 Organization: Rocksolid Light Message-ID: <2cf5a18a58a4281b1b67935b31a8fe49@www.novabbs.org> References: <484586d667d1e9e7ae11184dbd362619@www.novabbs.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Injection-Info: i2pn2.org; logging-data="3177705"; mail-complaints-to="usenet@i2pn2.org"; posting-account="65wTazMNTleAJDh/pRqmKE7ADni/0wesT78+pyiDW8A"; User-Agent: Rocksolid Light X-Spam-Checker-Version: SpamAssassin 4.0.0 X-Rslight-Site: $2y$10$WDk1cpIZjc2hxr0yu4Fv4uD4jHBTdGoGMou9IHBwpGB2Jl0J8xPU. X-Rslight-Posting-User: ac58ceb75ea22753186dae54d967fed894c3dce8 Bytes: 3269 Lines: 61 On Mon, 19 Aug 2024 23:23:11 +0000, Brett wrote: > MitchAlsup1 wrote: >> On Mon, 19 Aug 2024 21:46:07 +0000, Brett wrote: >> >>> Banked register files, a mental exercise at expanding the register file. >>> >>> With three operand RISC you have you have three 5 bit register >>> specifiers using 15 bits. >>> >>> If instead you have eight banks of eight registers you have a 3 bit bank >>> specifier and three 3 bit register specifiers for 12 bits. >>> >>> Now the banks need to talk to each other and so you would add a bit to >>> each register specifier to tell whether it uses the bank or the base >>> registers, for 72 registers total, not 64. So a 3 bit bank specifier >>> and three 4 bit register specifiers for 15 bits, the same as a 32 >>> register RISC chip. >> >> This covers 100% of instructions that smell like:: >> >> ADD R17,R17,R25 >> >> but covers 000% of the instructions that smell like:: >> >> ADD R7,R17,R25 >> >> I strongly suspect that it covers less than 50% of the 3-operand >> instruction uses. > > My description was bad, let’s do a MC 68000 version, base registers are > addressing mostly, and the banks are integer/float. There is a reason this style fell out of fashion. Not enough address registers at the same time one had not enough data registers--whereas a flat 16-entry file had enough for either. There is a reason CRAY-2 staging memory was not copied, too; and it is mainly the same reason. > The compiler can handle this easily, simple dependency grouping and if > you > need more than 8 registers you use the No base flag to total to the base > registers. So you have two chains that total in two banks and both write > to > the base registers where the last total of the two chains are added. > > This saves a lot of no bank bits, only the result needs a no bank > override. Yes, 68K did have pretty good code density--{{Now if 68020 had NOT gone a blown up the addressing modes...}} > > Simple code only uses base registers, or base plus one bank. > Call and return parameters are in the base registers, spilling to a bank > if you need more. > > Since only the result needs an override, you can do 4 banks of 16 > registers. Dream on.