Path: ...!news.mixmin.net!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail From: jgd@cix.co.uk (John Dallman) Newsgroups: comp.arch Subject: Re: Computer architects leaving Intel... Date: Fri, 30 Aug 2024 15:48 +0100 (BST) Organization: A noiseless patient Spider Lines: 53 Message-ID: References: <2024Aug29.135124@mips.complang.tuwien.ac.at> Reply-To: jgd@cix.co.uk Injection-Date: Fri, 30 Aug 2024 16:48:10 +0200 (CEST) Injection-Info: dont-email.me; posting-host="38033b2def40f84b61277130ee7f3660"; logging-data="577339"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX1+1jRqeCB44p+cqw1ZlMsafWuYI+wCR7Rs=" Cancel-Lock: sha1:XGfmlufg/DLyByMOb4PotkxSIZE= X-Clacks-Overhead-header: GNU Terry Pratchett Bytes: 3258 In article <2024Aug29.135124@mips.complang.tuwien.ac.at>, anton@mips.complang.tuwien.ac.at (Anton Ertl) wrote: > Concerning the demand, RISC-V has the advantage of no ARM tax (and > legal costs like those between ARM and Qualcomm over the > developments started at NUVIA) True, although the market for high-performance application cores is less price-sensitive than the market for low-performance embedded ones. > Another RISC-V advantage is that the government of the USA puts > restrictions on ARM that should not apply to the free RISC-V > architecture. > > It would apply to implementations designed in the USA (such as those > by Ahead), but the point is that on the ISA level, and thus the > buy-in into the ecosystem (e.g., from ISVs), RISC-V has an advantage. As someone who does porting and platforms for an ISV, I'm seeing no customer demand whatsoever. I'm pretty sure that's because of the lack of high-performance implementations. I'd like to do RISC-V, because new architectures are fun, but I can't get hardware at present that's up to the job, and so I can't justify spending time on it. > RISC-V also has a technical advantage over ARM: It has Ztso (total > store order) as an optional extension, which helps porting of > multi-threaded software from AMD64 (and emulation of AMD64 > software). No such thing on ARMv8 or ARMv9 yet, although > implementations like the Apple M1 and Fujitsu A64FX provide > this feature. Yup, that's an advantage. I have not had trouble with the lack of it on multi-threaded ARM Linux or ARM Windows, but the threading framework I use was originally developed on SPARC and does its mutexes properly. > > But it's also possible they just want to carry on being chip > > architects while being in charge of their own company. > Sure. But what are the investors seeing in the company? Hard to say, given the things venture capitalists are prepared to throw money at these days. > Even if an architecture has a long track record, like MIPS, that's > not enough, as the switch from the MIPS ISA to RISC-V shows. In my market sector, so far, that's "the death of MIPS." That happened in 2008, simply because it wasn't remotely performance-competitive. > What I read is that the Snapdragon X implements ARM v8.7. You're right, I mis-remembered. John