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From: jseigh <jseigh_es00@xemaps.com>
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Subject: Re: Memory ordering
Date: Wed, 18 Dec 2024 06:43:43 -0500
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On 12/17/24 15:41, Chris M. Thomasson wrote:
> 
> Agreed. Humm... The CAS is interesting to me.
> 
> atomic_compare_exchange_weak
> atomic_compare_exchange_strong
> 
> The weak one can fail spuriously... Akin to LL/SC in a sense?

Most likely LL/SC in the implementation.  If you are calling
cas in a loop, then the weak form will be safe, it will just
retry.  The strong form is if you are not in a loop and the
cas emulation code has extra logic to filter out spurious
failures and retry internally.
> 
> atomic_compare_exchange_weak_explicit
> atomic_compare_exchange_strong_explicit
> 
> A membar for the success path and one for the failure path. Oh that's 
> fun. Sometimes I think its better to use relaxed for all of the atomics 
> and use explicit barriers ala atomic_thread_fence for the order. Well, 
> that is more in line with the SPARC way of doing things... ;^)
> 
No sure why that is there. Possibly for non loop usages.