Path: news.eternal-september.org!eternal-september.org!.POSTED!not-for-mail From: john larkin Newsgroups: sci.electronics.design,comp.dsp Subject: Re: DDS question: why sine lookup? Date: Wed, 14 May 2025 14:53:07 -0700 Organization: A noiseless patient Spider Lines: 141 Message-ID: References: <1000ke2$1no04$1@paganini.bofh.team> <5d580159-4fe4-e9bc-9170-c009137d307b@electrooptical.net> <1002d7n$1v5jg$1@paganini.bofh.team> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Injection-Date: Wed, 14 May 2025 23:46:04 +0200 (CEST) Injection-Info: dont-email.me; posting-host="855b30e586f39e33915886a13648cd91"; logging-data="2858791"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX18Okd+0Twi71RvecrrGbIFa" User-Agent: ForteAgent/8.00.32.1272 Cancel-Lock: sha1:LMD8tVa8W9SLAl+2kk9wZtV3Rvk= On Wed, 14 May 2025 15:05:41 -0400, Phil Hobbs wrote: >On 2025-05-14 11:35, Waldek Hebisch wrote: >> In sci.electronics.design Phil Hobbs wrote: >>> On 2025-05-13 19:25, Waldek Hebisch wrote: >>>> In sci.electronics.design john larkin wrote: >>>>> A DDS clock generator uses an NCO (a phase accumulator) and takes some >>>>> number of MSBs, maps through a sine lookup table, drives a DAC and a >>>>> lowpass filter and finally a comparator. The DAC output gets pretty >>>>> ratty near Nyquist, and the filter smooths out and interpolates the >>>>> steps and reduces jitter. >>>>> >>>>> But why do the sine lookup? Why not use the phase accumulator MSBs >>>>> directly and get a sawtooth, and filter that? >>>>> >>>>> The lowpass filter looks backwards in time for a bunch of ugly samples >>>>> to average into a straight line. The older sine samples are the wrong >>>>> polarity! If the filter impulse response is basically zero over the >>>>> period of the sawtooth, and we compare near the peak, we'll average a >>>>> lot of steps and forget the big sawtooth reset. >>>> >>>> Sine is close to optimal for high quality DDS. The math is >>>> as follows. First, your DAC has some response in time >>>> domain, but for purpose of computation one can assume that >>>> at clock tick number n it generates delta peak centered >>>> at nT_0 with amplitude f(nT_0/T_1) where f is function stored in >>>> lookup table, T_0 is period of digital clock and T_1 is desired >>>> period. Mathematically >>>> >>>> S(t) = \sum_n f(nT_0/T_1)\delta(t - nT_0) = \sum_n f(t/T_1)\delta(t - nT_0) >>>> >>>> where summation is over all integer n. >>>> >>>> Fourier transform of this is >>>> >>>> C\sum_l \sum_m c_l \delta(\omega - 2m\pi/T_0 - 2l\pi/T_1) >>>> >>>> where we have double summation over integer l and m, c_l is >>>> l-th Fourier coefficient of f and C is a constant. >>>> Sine has only 2 Fourier components, so formula simplifies to >>>> >>>> (1/2)C\sum_m (\delta(\omega - 2m\pi/T_0 - 2\pi/T_1) + >>>> \delta(\omega - 2m\pi/T_0 + 2\pi/T_1)) >>>> >>>> With aggressive filtering high freqency components can be >>>> made arbitrarily small, so after filter Fourier transform >>>> is >>>> >>>> (M/2)C(\delta(\omega - 2\pi/T_1) + \delta(\omega+ 2\pi/T_1)) + >>>> small distortion >>>> >>>> where M represents transmitance of the filter at frequency >>>> 1/T_1. Back in time domain signal is >>>> >>>> M\sin(t) + small distortion >>>> >>>> The point is that distortion, hence phase noise can be made >>>> arbitrarily small. >>>> >>>> What happens with different f? When T_0/T_1 is irrational, >>>> the sum 2m\pi/T_0 + 2l\pi/T_1 can take values arbitrarily >>>> close to 0. In particular, there will be combinations of >>>> l and m such that this sum is in the interval [-\pi/T_1, \pi/T_1], >>>> so we will get low frequency terms with wrong frequency. >>>> Assuming fixed low pass filter such terms can not be filered >>>> out. How bad this is? For sawtooth the second Fourier >>>> coefficient has maginitude equal to half of the magnitude >>>> of the first coefficient, so one can expect distortion >>>> of order 50%, which looks quite bad. Using symmetric >>>> troangular weave, second Fourier coefficient is 0 and >>>> third has magnitude 1/9 of magnitude of the first >>>> coefficient, which is much better, but still limits >>>> possible quality. >>>> >>>> >>> Distortion and phase noise are only obliquely related. >> >> Well, signal to the comparator is f(t) + r(t) where r(t) >> is distortion. Assuming that distortion is reasonably >> small and regular we have >> >> phase error \approx -r(t_0)/f'(t_0) >> >> where t_0 is zero of f. To minimize phase error you can >> try to make f'(t_0) big, but John is working over an >> octave, so not much possibility here. >> >> So we need small r(t_0). In general desired frequency and >> and frequency of digital clock are uncorelated, so zeros >> of f will be randomly distributed over quasi periods of >> r, which means that to have small avarage error you >> need small average of absolute value of r. Similarly >> smal maximal error need small maximum of r. >> >> Of course, there are constant factors because simple Fourier >> computation works exactly only for energy. Those constants >> are hard to compute but in practice do not tend to be really >> large (say of order of 2 or 3). So at low accuracy there >> may be some room to use different function than sine. >> For higher accuracy the above calculation gives too big >> term to ignore. > >"Distortion" to me means harmonics and IMD. The usual small-signal >analysis isn't too useful when the interference is at frequencies >comparable to or greater than the fundamental. > >And it isn't really clock interference that's in view with a DDS, >because there's a zero-order hold, which in principle nulls out the >clock and all of its harmonics. (You have to have a reconstruction >filter of some sort anyway.) > >What kills you with DDS is the nasty, very high-order subharmonics due >to truncation of the phase word. Power supply junk is often of the same >order, but its easier to get rid of--the truncation sidebands extend >down to the very low baseband. A highpass filter stage can help that some. It helps reject logic supply junk too. > >Cheers > >Phil Hobbs Yeah, math is instructive but a real nonlinear circuit needs to be simulated and then built and tested. The number of bits into and out of the sine table, time skew into the resistive DAC, the real-life filter, FPGA digital supply noise, all that grody stuff. I'm simulating an 8-bit sine lookup, a 5-bit resistive DAC, 160 MHz clock, 10-20 MHz out, and under 1 ns p-p jitter. It's hard to measure jitter in Spice. I'm just randomly measuring cycles with the cursor. There must be a better way. Maybe something with a delay line, compared against clock cycles?