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From: John Savard <quadibloc@servername.invalid>
Newsgroups: comp.arch
Subject: Re: Privilege Levels Below User
Date: Tue, 11 Jun 2024 13:07:56 -0600
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On Tue, 11 Jun 2024 00:45:28 +0000, mitchalsup@aol.com (MitchAlsup1)
wrote:

>I forgot to add that Mc 88120 had these features in 1992.

>Stores waited for retirement.

Given that in the case of external RAM, as opposed to registers inside
the processor, there is only one possible value at any location...
memory doesn't have a pile of rename locations to play with... I am so
unimaginative that I don't think I could design a CPU in which stores
to RAM didn't wait for the instruction that performed them to retire.

That, though, wouldn't save me from Spectre, since Spectre leaks
information by virtue of fetches of stuff _read_ in earlier speculated
code that didn't really happen being in cache.

John Savard