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From: anton@mips.complang.tuwien.ac.at (Anton Ertl)
Newsgroups: comp.arch
Subject: Re: a bit of history, Stealing a Great Idea from the 6600
Date: Fri, 03 May 2024 15:33:47 GMT
Organization: Institut fuer Computersprachen, Technische Universitaet Wien
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John Levine <johnl@taugh.com> writes:
[only 2 condition code bits]
>In their archtecture book Brooks and Blaauw say it was a mistake, but
>it also would have been a problem to fit conditional branches into the
>instruction set if they needed more instruction bits to say which
>codes to test. As it was, the branch instructions had 4 condition bits
>which let them check for any combination of two-bit conditions along
>with 1111 for unconditional branch and 0000 for no-op.

The architecture paid for the reduction in branches with an increase
in other instructions; S/360 needed signed and unsigned versions of a
number of instructions, e.g.,

signed unsigned
A      AL
AR     ALR
S      SL
SR     SLR
C      CL
CR     CLR

Other instruction sets with 16-bit instructions have no problem
supporting the usual NCZV flags.

IBM then continued in their tradition by having < = > and sticky
overflow flags in Power (and a separate carry, sticky overflow and
overflow flag); this also requires signed and unsigned compares (cmp
and cmpl along with variants).

- anton
-- 
'Anyone trying for "industrial quality" ISA should avoid undefined behavior.'
  Mitch Alsup, <c17fcd89-f024-40e7-a594-88a85ac10d20o@googlegroups.com>