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From: mitchalsup@aol.com (MitchAlsup1)
Newsgroups: comp.arch
Subject: Re: Tonights Tradeoff - Background Execution Buffers
Date: Tue, 24 Sep 2024 20:38:52 +0000
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On Tue, 24 Sep 2024 20:03:29 +0000, Robert Finch wrote:

> Under construction: Q+ background execution buffers for the block memory
> operations. For instance, a block store operation can be executed in the
> background while other instructions are executing. Store operations are
> issued when the MEM unit is not busy. Background instructions continue
> to execute even when interrupts occur. The background operations may be
> useful for initializing blocks of memory that are not needed right-away.
> When the operation is issued a handle for the buffer is returned in the
> destination register so that the status of the operation may be queried,
> or the operation cancelled.

This is how My 66000 performs:: LDM, STM, ENTER, EXIT, MM, and MS.
Addresses are AGENED and then a state machine over in the memory
unit performs the required steps. {{Not usefully different than the
divider performing the individual steps of division.}} While the
unit performs its duties, other units can be fed and complete
other instructions.

You just have to mark the affected registers to prevent hazards.